Metal-oxide-semiconductor field-effect (MOSFET) transistors can tolerate a limited absolute maximum voltage level on drain, source, gate and body. Same applies to a maximum voltage difference on each two nodes (e.g., between the two of Source, Drain, Gate). Transistor body biasing can be used to ensure that the voltage difference between the two nodes is within tolerable limits. In general, the body of PMOS needs to be connected to highest available voltage in the chip and the body of NMOS is connected to lowest voltage.